FPGA design&verification specialist (FPGA, ASIC, SoC, VHDL, Verilog), SW-?Development (Python, C/C++),
Aktualisiert am 02.03.2021
Profil
Freiberufler / Selbstständiger
Verfügbar ab: 01.05.2021
Verfügbar zu: 100%
davon vor Ort: 100%
VHDL
FPGA
System Verilog
C++
C
Microsemi
SoC
VHDL Verification
UART
PCIe
Altera Quartus
MATLAB
UVM
SPI
Lattice
Git
Vivado
Verilog
Ethernet
Altera
Xilinx
TCL
Python
English
Professional working proficiency
French
Limited working proficiency
German
Excellent working proficiency
Hungarian
Native

Einsatzorte

Einsatzorte

Deutschland, Schweiz, Österreich
nicht möglich

Projekte

Projekte

2 Jahre 1 Monat
2018-02 - 2020-02

Develop and manifacture a 3D, cutting-edge quality, hand-held scanner

FPGA engineer, System concept designer
FPGA engineer, System concept designer
  • The goal was to develop and manifacture a 3D, cutting-edge quality, hand-held scanner, the next generation of the well-known Leica BLK 360 scanner.
  • The product performed laser-based distance measurement, angle measurement, motor control, 3D point-cloud generation, camera image captures.
  • The whole development process had to be carried out, including selection of chips, allocation of tasks to FPGAs and to Snapdragon processor, definition of HW-test and verification environment, implementation of functionalities, test and verification, documentation, support of production
  • The (Microsemi) FPGAs of the system performed sensor data triggering, timestamping and capture, data processing, and data transmission.
  • Sensor data was captured via high-speed ADCs, MIPI, high-speed serial interfaces, UART, SPI, I2C, transmitted over PCIe (externally), AXI,APB, Avalon (internally).
  • MATLAB reference models were created for (proprietary) data processing algorithms which served also as reference model for FPGA implementation and were also used for test vector generation for testbench verification and regression testing.
  • Hardware tests were carried out by using a Python based prototype test environment and/or the API defined on Snapdragon.
  • Responsibilites covered the definition of FPGA system architecture, guidance of the FPGA team (5), collaboration with mechanical, electronics, low- and high level software teams and other departments, FPGA design implementation and verification, HW testing, production support, breakdown of deadlines, risk management.
  • The successfully developed product was presented in Hexagon Live Show in Las Vegas 2019 and was seeking similar success as its predecessor.
Leica Geosystems AG, Heerbrugg (Switzerland)
3 Jahre
2015-02 - 2018-01

Creation and implementation of a front-end co-processor architecture

FPGA firmware engineer, Algorithm and software developer
FPGA firmware engineer, Algorithm and software developer
  • The aim was to create a frontend coprocessor architecture and implement it on the Altera SoC (System on Chip) platform.
  • The coprocessor had to complete complex, real time HD video processing tasks based on optical flow estimation.
  • The algorithmic background was defined and tested in MATLAB.
  • Functionalities were implemented on ARM platform in C/C++.
  • Finally the whole coprocessor was implemented on FPGA in VHDL and Verilog.
  • A processor simulation environment was created in ModelSIM and a test software was developed for real time tests.
  • Responsibilities included the assessment of needs, team working, documentation and project management.
Eutecus Inc., Hungary and Berkeley
9 Monate
2014-06 - 2015-02

Creation of several FPGA and software modules for an intelligent high-speed camera system (EDICAM)

FPGA engineer
FPGA engineer
  • Several FPGA and software modules had to be created for a high speed intelligent camera system (EDICAM).
  • HDL and C++ were used to program both the FPGA of the camera and of the motherboard, the latter of which was connected to the motherboard via PCIe.
  • The main goal was to establish real time firmware updates to the FPGA of the camera, driven by the FPGA of the motherboard.
  • The control software between the PC and the FPGA was implemented in C++.
ProDSP Ltd.
1 Jahr 1 Monat
2014-02 - 2015-02

FPGA laboratory sessions

FPGA Lab leader assistant
FPGA Lab leader assistant
  • FPGA laboratory sessions held for professionals in computer science, in 4 hours per week.
  • The whole HDL design process was presented on Xilinx FPGA platform.
  • The sessions consisted of RTL design (in HDL), simulation, logic analysis and testing.
BME (Budapest University of Technology)
1 Jahr
2013-07 - 2014-06

FPGA intern

  • The main objective was to develop FPGA modules for video transmitter systems.
  • The project focused on creating a video test environment that displayed different patterns in various configurable resolutions.
  • The FPGA test system was finalized and interfaced with an ARM controller.
LightWare Visual Engineering Ltd.

Aus- und Weiterbildung

Aus- und Weiterbildung

2012 - 2014

MSc in Electrical Engineering

Budapest University of Technology/ Faculty of Embedded Information Systems

MSEE degree

2009 - 2012

BSc in Electrical Engineering

Budapest University of Technology/ Faculty of Embedded and Control Systems

BSEE degree

2006 - 2009

Apaczai Csere Janos High School/ Faculty of Maths and Physics

Trainings

07/2019

Comprehensive SystemVerilog training by Doulos (Ringwood, UK) 

04/2018

Future Electronics Microsemi training (Zürich)

Kompetenzen

Kompetenzen

Top-Skills

VHDL FPGA System Verilog C++ C Microsemi SoC VHDL Verification UART PCIe Altera Quartus MATLAB UVM SPI Lattice Git Vivado Verilog Ethernet Altera Xilinx TCL Python

Produkte / Standards / Erfahrungen / Methoden

Design softwares

  • MS Visual Studio
  • ISE Design Suite
  • Xilinx Platform Studio
  • Vivado
  • Quartus II
  • Qsys
  • ModelSim
  • QuestaSim
  • Synplify Pro
  • Eclipse
  • AVR Studio
  • Libero (Microsemi)
  • Diamond (Lattice)
  • Sigasi
  • IDesignSpec (Agnysis)

Other

  • Microsoft Office
    • Excel
    • PowerPoint
    • Word
    • Outlook
    • Visio
  • GIT
  • SVN
  • Altium Designer
  • PADS
  • ORCAD

Organisational/ managerial skills

  • Good organizational skills
  • able to manage multiple tasks at once
  • eye for detail
  • strong interpersonal and teamwork skills
  • people-oriented and logical problem-solver

Betriebssysteme

ARM
AVR
FPGA
Xilinx, Altera, Lattice, Microsemi
Linux
Raspberry Pi
Windows

Programmiersprachen

Assembly
C
C++
HTML
Java
LabVIEW
MATLAB
OpenCL
PHP
Python
Simulink
SQL
Systemverilog (UVM)
TCL
Verilog
VHDL

Einsatzorte

Einsatzorte

Deutschland, Schweiz, Österreich
nicht möglich

Projekte

Projekte

2 Jahre 1 Monat
2018-02 - 2020-02

Develop and manifacture a 3D, cutting-edge quality, hand-held scanner

FPGA engineer, System concept designer
FPGA engineer, System concept designer
  • The goal was to develop and manifacture a 3D, cutting-edge quality, hand-held scanner, the next generation of the well-known Leica BLK 360 scanner.
  • The product performed laser-based distance measurement, angle measurement, motor control, 3D point-cloud generation, camera image captures.
  • The whole development process had to be carried out, including selection of chips, allocation of tasks to FPGAs and to Snapdragon processor, definition of HW-test and verification environment, implementation of functionalities, test and verification, documentation, support of production
  • The (Microsemi) FPGAs of the system performed sensor data triggering, timestamping and capture, data processing, and data transmission.
  • Sensor data was captured via high-speed ADCs, MIPI, high-speed serial interfaces, UART, SPI, I2C, transmitted over PCIe (externally), AXI,APB, Avalon (internally).
  • MATLAB reference models were created for (proprietary) data processing algorithms which served also as reference model for FPGA implementation and were also used for test vector generation for testbench verification and regression testing.
  • Hardware tests were carried out by using a Python based prototype test environment and/or the API defined on Snapdragon.
  • Responsibilites covered the definition of FPGA system architecture, guidance of the FPGA team (5), collaboration with mechanical, electronics, low- and high level software teams and other departments, FPGA design implementation and verification, HW testing, production support, breakdown of deadlines, risk management.
  • The successfully developed product was presented in Hexagon Live Show in Las Vegas 2019 and was seeking similar success as its predecessor.
Leica Geosystems AG, Heerbrugg (Switzerland)
3 Jahre
2015-02 - 2018-01

Creation and implementation of a front-end co-processor architecture

FPGA firmware engineer, Algorithm and software developer
FPGA firmware engineer, Algorithm and software developer
  • The aim was to create a frontend coprocessor architecture and implement it on the Altera SoC (System on Chip) platform.
  • The coprocessor had to complete complex, real time HD video processing tasks based on optical flow estimation.
  • The algorithmic background was defined and tested in MATLAB.
  • Functionalities were implemented on ARM platform in C/C++.
  • Finally the whole coprocessor was implemented on FPGA in VHDL and Verilog.
  • A processor simulation environment was created in ModelSIM and a test software was developed for real time tests.
  • Responsibilities included the assessment of needs, team working, documentation and project management.
Eutecus Inc., Hungary and Berkeley
9 Monate
2014-06 - 2015-02

Creation of several FPGA and software modules for an intelligent high-speed camera system (EDICAM)

FPGA engineer
FPGA engineer
  • Several FPGA and software modules had to be created for a high speed intelligent camera system (EDICAM).
  • HDL and C++ were used to program both the FPGA of the camera and of the motherboard, the latter of which was connected to the motherboard via PCIe.
  • The main goal was to establish real time firmware updates to the FPGA of the camera, driven by the FPGA of the motherboard.
  • The control software between the PC and the FPGA was implemented in C++.
ProDSP Ltd.
1 Jahr 1 Monat
2014-02 - 2015-02

FPGA laboratory sessions

FPGA Lab leader assistant
FPGA Lab leader assistant
  • FPGA laboratory sessions held for professionals in computer science, in 4 hours per week.
  • The whole HDL design process was presented on Xilinx FPGA platform.
  • The sessions consisted of RTL design (in HDL), simulation, logic analysis and testing.
BME (Budapest University of Technology)
1 Jahr
2013-07 - 2014-06

FPGA intern

  • The main objective was to develop FPGA modules for video transmitter systems.
  • The project focused on creating a video test environment that displayed different patterns in various configurable resolutions.
  • The FPGA test system was finalized and interfaced with an ARM controller.
LightWare Visual Engineering Ltd.

Aus- und Weiterbildung

Aus- und Weiterbildung

2012 - 2014

MSc in Electrical Engineering

Budapest University of Technology/ Faculty of Embedded Information Systems

MSEE degree

2009 - 2012

BSc in Electrical Engineering

Budapest University of Technology/ Faculty of Embedded and Control Systems

BSEE degree

2006 - 2009

Apaczai Csere Janos High School/ Faculty of Maths and Physics

Trainings

07/2019

Comprehensive SystemVerilog training by Doulos (Ringwood, UK) 

04/2018

Future Electronics Microsemi training (Zürich)

Kompetenzen

Kompetenzen

Top-Skills

VHDL FPGA System Verilog C++ C Microsemi SoC VHDL Verification UART PCIe Altera Quartus MATLAB UVM SPI Lattice Git Vivado Verilog Ethernet Altera Xilinx TCL Python

Produkte / Standards / Erfahrungen / Methoden

Design softwares

  • MS Visual Studio
  • ISE Design Suite
  • Xilinx Platform Studio
  • Vivado
  • Quartus II
  • Qsys
  • ModelSim
  • QuestaSim
  • Synplify Pro
  • Eclipse
  • AVR Studio
  • Libero (Microsemi)
  • Diamond (Lattice)
  • Sigasi
  • IDesignSpec (Agnysis)

Other

  • Microsoft Office
    • Excel
    • PowerPoint
    • Word
    • Outlook
    • Visio
  • GIT
  • SVN
  • Altium Designer
  • PADS
  • ORCAD

Organisational/ managerial skills

  • Good organizational skills
  • able to manage multiple tasks at once
  • eye for detail
  • strong interpersonal and teamwork skills
  • people-oriented and logical problem-solver

Betriebssysteme

ARM
AVR
FPGA
Xilinx, Altera, Lattice, Microsemi
Linux
Raspberry Pi
Windows

Programmiersprachen

Assembly
C
C++
HTML
Java
LabVIEW
MATLAB
OpenCL
PHP
Python
Simulink
SQL
Systemverilog (UVM)
TCL
Verilog
VHDL

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